Engineering background in digital/analog/mix-mode IC. Strong understanding on display backplane related functional blocks, such as row/column drivers, ADC/DAC, LDO, output buffers etc.
Engineering background in semiconductor process and device development, testing and validation.
Engineering background in compact model development.
Strong presentation and communication skills.
Strong analytical, critical thinking, and problem-solving skills.
Track record with designing and conducting DOEs, data processing, and provide technical assessment.
Hands-on layout design, pre/post layout simulation, and tape-out experience preferred.
Hands-on experience & technical knowledge in the design and development of active matrix displays or other array-based systems preferred.
Chip/panel architecture level design experience is a plus.
Understanding of electrical-optical modeling of display-related emissive devices is a plus.